AMD is about to launch its Instinct MI200 GPU accelerator which will be the first chip to feature an MCM graphics architecture but it looks like the next-generation Instinct MI300, featuring the CDNA 3 architecture, is going to blow it away with a quad MCM design.
AMD Instinct MI300 Rumored To Feature Four MCM GPUs Based on CDNA 3 Graphics Architecture
The AMD Instinct MI200 accelerator with its CDNA 2 architecture is expected to feature two GPU dies on the same package. These will be connected by an Infinity Fabric interconnect and will also feature a separate die that will serve as a multi-tier cache between the two GPUs. Each graphics die will be known as GCD while the cache-die will be known as MCD.
MI300 will feature 4 GCDs
— Kepler (@Kepler_L2) September 7, 2021
There will be two CDNA 2 GPUs onboard the Instinct MI200 package but the next-generation HPC accelerator is rumored to double that. According to Kepler_L2, the Instinct MI300 will feature a 4-GCD design based on the brand new CDNA 3 architecture. The upcoming Instinct MI200 was going to feature 128 compute units per die but that has changed to 110 compute units since last week's rumor. A total of 220 Compute Units would net 14,080 cores and if we take the exact number and multiply it by 4 (the number of GCDs on Instinct MI300), we end up with 440 Compute Units or an insane 28,160 cores.
A recent AMD ROCm Developer Tools update that was spotted by Komachi did confirm a maximum of 4 MCM GPUs but those are simply 'Aldebaran' SKUs. There are expected to be at least four CDNA 2 powered Instinct accelerators with their respective (unique IDs) listed below. Note that the number doesn't represent the number of dies on each device but rather the device itself:
- 0x7408
- 0x740C
- 0x740F
- 0x7410
Komachi has also previously provided a die representation of next-gen AMD MI300 CDNA 3 accelerators. There are four GCD's and four MCD's with MCD's sitting on top of the GCD but connected together.
Idle Talk : So ..... my guess seems to have been very wrong. If MCD means "Memory Cache Die" or "Multi Cache Die", i think it will look like this (figure is for reference). https://t.co/kgrTbRyYL2 pic.twitter.com/zt417B0Ih0
— 遠坂小町@Komachi (@KOMACHI_ENSAKA) June 4, 2021
Now that would be true if AMD makes no changes whatsoever when moving from CDNA 2 to CDNA 3 but that's not the case. CDNA 3 is expected to bring forward a revised new architecture that won't be another Vega derivative like Arcturus or Aldebaran. The GPU architecture may also use a layout that might end up looking similar to the new WGP/SE arrangement on the new RDNA 3 chips or an entirely new design tailored towards the HPC segment. But one thing is for sure, those quad-MCM GPUs definitely are something that we can't wait to see in action!
AMD Radeon Instinct Accelerators 2020
| Accelerator Name | AMD Radeon Instinct MI6 | AMD Radeon Instinct MI8 | AMD Radeon Instinct MI25 | AMD Radeon Instinct MI50 | AMD Radeon Instinct MI60 | AMD Instinct MI100 | AMD Instinct MI200 | AMD Instinct MI300 |
|---|---|---|---|---|---|---|---|---|
| GPU Architecture | Polaris 10 | Fiji XT | Vega 10 | Vega 20 | Vega 20 | Arcturus (CDNA 1) | Aldebaran (CDNA 2) | TBA (CDNA 3) |
| GPU Process Node | 14nm FinFET | 28nm | 14nm FinFET | 7nm FinFET | 7nm FinFET | 7nm FinFET | Advanced Process Node | Advanced Process Node |
| GPU Dies | 1 (Monolithic) | 1 (Monolithic) | 1 (Monolithic) | 1 (Monolithic) | 1 (Monolithic) | 1 (Monolithic) | 2 (MCM) | 4 (MCM)? |
| GPU Cores | 2304 | 4096 | 4096 | 3840 | 4096 | 7680 | 14,080? | 28,160? |
| GPU Clock Speed | 1237 MHz | 1000 MHz | 1500 MHz | 1725 MHz | 1800 MHz | ~1500 MHz | TBA | TBA |
| FP16 Compute | 5.7 TFLOPs | 8.2 TFLOPs | 24.6 TFLOPs | 26.5 TFLOPs | 29.5 TFLOPs | 185 TFLOPs | TBA | TBA |
| FP32 Compute | 5.7 TFLOPs | 8.2 TFLOPs | 12.3 TFLOPs | 13.3 TFLOPs | 14.7 TFLOPs | 23.1 TFLOPs | TBA | TBA |
| FP64 Compute | 384 GFLOPs | 512 GFLOPs | 768 GFLOPs | 6.6 TFLOPs | 7.4 TFLOPs | 11.5 TFLOPs | TBA | TBA |
| VRAM | 16 GB GDDR5 | 4 GB HBM1 | 16 GB HBM2 | 16 GB HBM2 | 32 GB HBM2 | 32 GB HBM2 | 64/128 GB HBM2e? | TBA |
| Memory Clock | 1750 MHz | 500 MHz | 945 MHz | 1000 MHz | 1000 MHz | 1200 MHz | TBA | TBA |
| Memory Bus | 256-bit bus | 4096-bit bus | 2048-bit bus | 4096-bit bus | 4096-bit bus | 4096-bit bus | 8192-bit | TBA |
| Memory Bandwidth | 224 GB/s | 512 GB/s | 484 GB/s | 1 TB/s | 1 TB/s | 1.23 TB/s | ~2 TB/s? | TBA |
| Form Factor | Single Slot, Full Length | Dual Slot, Half Length | Dual Slot, Full Length | Dual Slot, Full Length | Dual Slot, Full Length | Dual Slot, Full Length | Dual Slot, Full Length / OAM | TBA |
| Cooling | Passive Cooling | Passive Cooling | Passive Cooling | Passive Cooling | Passive Cooling | Passive Cooling | Passive Cooling | TBA |
| TDP | 150W | 175W | 300W | 300W | 300W | 300W | TBA | TBA |
The post AMD Instinct MI300 Could Feature Quad MCM GPUs Based on CDNA 3 Architecture by Hassan Mujtaba appeared first on Wccftech.
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