TSMC 5nm Risk Production Starts; Process Delivers 15% Performance Gain

Except for Intel, foundries all over the world are moving fast with next-generation lithography and manufacturing processes. While the Santa Clara chip giant has a clear transistor density advantage over others, marketing departments often ‘forget’ this fact, and continue to portray things direr than they really are.  Now, TSMC has commenced risk production for 5nm and validated the process design with its OIP (Open Innovation Platform) partners. Take a look below for more details.

TSMC’s 5nm Process Delivers 1.8X Logic Density And 15% Performance Gain When Compared To 7nm

TSMC’s announced its delivery of 5nm design infrastructure and as a result, we get to know more details for the process. TSMC, in collaboration with its design partners, has validated its 5nm design through silicon test vehicles. Silicon test vehicles allow manufacturers to validate their design choices.

TSMC’s 5nm is directed primarily towards 5G and IoT applications instead of processors for the time being. The company has confirmed that Process Design Kits are now available for production design, and these cover the full spectrum of the design process; from conception to verification and signoff. Additionally, the fab has confirmed that 5nm has finally entered risk production. This is right on schedule according to plans disclosed by TSMC last year.

Side shot of completed gate-all-around transistors on IBM’s 5nm GAAFET.

The 5nm process allows for 1.8X logic density and 15% performance increase on a Cortex A72 core when compared to TSMC’s 7nm. At this point, we’re uncertain about which 7nm process TSMC is referring to here. The company’s first generation 7nm (present on the Apple A12 and Qualcomm Snapdragon 855) uses DUV lithography, while its 7nm+ node based on the N7+ process uses EUV lithography. In our opinion, TSMC’s referring to the former, DUV 7nm over here.

In today’s second bit of news, 7nm orders for TSMC have increased in volume. The bulk of the orders are from handset manufacturers, and this increase is expected to cause TSMC’s 7nm manufacturing process to utilize 100% production capacity. In more good news, DigiTimes also suggests that TSMC commenced volume production of 7nm chips built using EUV at the end of last month. Shipments for the chips will commence in the second half of this year and orders for the new iPhone’s processors will start production in 3Q.

Thoughts? Let us know what you think in the comments section below and stay tuned. We’ll keep you updated on the latest.

The post TSMC 5nm Risk Production Starts; Process Delivers 15% Performance Gain by Ramish Zafar appeared first on Wccftech.



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