Official information regarding AMD's next-generation Ryzen 4000 CPU family based on the Zen 3 core architecture has been unveiled. The information is part of confidential AMD documents that were shared with us by CyberCatPunk.
AMD's Ryzen 4000 'Vermeer" CPUs Featuring Next-Gen Zen 3 Cores Detailed In Leaked Documents
The documents provide us some new information while reiterating a few bits and pieces that we've already known for a while now. For starters, the AMD Vermeer Desktop CPU family is known as the AMD Family 19h Model 21h B0. According to the document, the AMD Zen 3 based Ryzen 4000 AM4 CPU family, codenamed Vermeer, is designed for use in high-performance desktop platforms & will feature up to two CCD's (Core/Cache Complex Dies) and a single IOD (I/O Die).
Unlike the previous generation design where each CCD comprised of two CCX's (Core Complexes), the Zen 3 CCD will consist of a single CCX which will feature 8 cores that can run in either a single-thread mode (1T) or a two-thread mode (2T) for up to 16 threads per CCX. Since the chip houses a maximum of two CCDs, the core and thread count will max out at 16 cores and 32 threads which is the same as the existing flagship AM4 desktop CPU, the Ryzen 9 3950X.
Each Zen 3 core will feature 512 KB of L2 cache for a total of 4 MB of L2 cache per CCD. That should equal 8 MB of L2 cache on a dual CCD CPU. Along with the L2 cache, each CCD will also comprise of up to 32 MB of shared L3 cache. For Zen 2, the L3 cache was split between the two CCX's with each CCX having their own separate (Up To) 16 MB cache. The size of the cache remains the same per CCD but now all cores can share a larger number of L3 cache.
Core Complex Die (CCD):
- Consists of one CCX
The CCX consists of:
- Up to 8 cores where each core may run in single-thread mode (1T) or two-thread SMT mode (2T)
for a total of up to 16 threads per complex - 512KB of L2 per core for a total of 4MB L2 per CCD
- Up to 32MB of L3 shared across all cores within the complex
Moving on, AMD's Ryzen 4000 'Vermeer" Desktop CPUs with Zen 3 cores will introduce a slightly improved scalable data fabric, supporting up to 512 GB per DRAM channel or up to 1 TB of ECC DRAM. For the memory interface, Ryzen 4000 Desktop CPUs will retain native DDR4-3200 speeds. There will be 2 unified memory controllers on the CPU, each supporting one DRAM channel for a total of 2 DIMMs per channel. The following are the details for the I/O and PCH feature set for the IOD:
Scalable Data Fabric. This provides the data path that connects the compute complexes, the I/O interfaces, and the memory interfaces to each other.
- Handles request, response, and data traffic
- Handles probe traffic to facilitate coherency, supporting up to 512GB per DRAM channel
- Handles interrupt request routing (APIC)
- Scalable Control Fabric. This provides the data path that provides a configuration access path to all blocks
- Handles configuration request, response, and data traffic
- GMI2: Up to two special Data Fabric ports, for connections to the CCDs.
Memory interface
- 2 Unified Memory Controllers (UMC), each supporting one DRAM channel
- 2 DDR4 PHYs. Each PHY supports:
- 64-bit data plus ECC
- 1 DRAM channel per PHY
- 2 DIMMs per channel
- DDR4 transfer rates from 1333MT/s to 3200MT/s
- UDIMM support
PSP and SMU
- MP0 (PSP) and MP1 (SMU) microcontrollers
- This document refers to the AMD Secure Processor technology as Platform Security Processor (PSP).
- Thermal monitoring
- Fuses
- Clock control
NBIO
- PCI Device ID information uses Vendor ID is 1022h for all devices (see Table 18 [PCI Device ID
Assignments.]. - 2 SYSHUBs
- 1 IOHUB with IOMMU v2.x
- Two 8x16 PCIe controllers supporting Gen1/Gen2/Gen3/Gen4. Note that SATA Express is supported by combining an x2 PCIe® port and two SATA ports on the same 2 lanes.
- 24 total lanes combo PHY, UPI muxing
Fusion Controller Hub (FCH or southbridge (SB))
- ACPI
- CLKGEN/CGPLL for refclk generation
- GPIOs (varying number depending on muxing)
- LPC
- Real-Time Clock (RTC)
- SMBus
- SPI/eSPI
- Azalia
- High Definition Audio
- Up to 2 lanes of SATA Gen1/Gen2/Gen3, also provides the legacy SATA support for SATAe
- ports. Shared with PCIe
- SGPIO
- USB3.1 Gen2
- 4 ports, includes support for legacy USB speeds
We also got to hear some new features for the Ryzen 4000 Desktop CPUs a few days back which we covered over here. We have also seen engineering samples running at speeds up to 4.9 GHz which is truly impressive. AMD is expected to unveil its next-generation AM4 CPU lineup based on the Zen 3 core architecture on 8th October as confirmed in an official announcement.
Here's Everything We Know About The AMD's Zen 3 Based Ryzen 4000 'Vermeer' Desktop CPUs
The AMD Zen 3 architecture is said to be the greatest CPU design since the original Zen. It is a chip that has been completely revamped from the group up and focuses on three key features of which include significant IPC gains, faster clocks, and higher efficiency.
AMD has so far confirmed themselves that Zen 3 brings a brand new CPU architecture, which helps deliver significant IPC gains, faster clocks, and even higher core counts than before. Some rumors have even pointed to a 17% increase in IPC and a 50% increase in Zen 3's floating-point operations along with a major cache redesign.
We also got to see a major change to the cache design in an EPYC presentation, which showed that Zen 3 would be offering a unified cache design which should essentially double the cache that each Zen 3 core could have access compared to Zen 2.
The CPUs are also expected to get up to 200-300 MHz clock boost, which should bring Zen 3 based Ryzen processors close to the 10th Generation Intel Core offerings. That, along with the massive IPC increase and general changes to the architecture, would result in much faster performance than existing Ryzen 3000 processors, which already made a huge jump over Ryzen 2000 and Ryzen 1000 processors while being an evolutionary product rather than revolutionary, as AMD unveiled very recently.
The key thing to consider is that we will get to see the return of the chiplet architecture and AMD will retain support on the existing AM4 socket. The AM4 socket was to last until 2020 so it is likely that the Zen 3 based Ryzen 4000 CPUs would be the last family to utilize the socket before AMD goes to AM5 which would be designed around the future technologies such as DDR5 and USB 4.0. AMD's X670 chipset was also hinted as to arrive by the end of this year and will feature enhanced PCIe Gen 4.0 support and increased I/O in the form of more M.2, SATA, and USB 3.2 ports.
It was recently confirmed by AMD that Ryzen 4000 Desktop CPUs will only be supported by 400 & 500-series chipsets while 300-series support would be left out.
AMD had also recently confirmed that Zen 3 based Ryzen 4000 desktop processors would mark the continuation of its high-performance journey. The Zen 3 architecture would be first available on the consumer desktop platform with the launch of the Vermeer family of CPUs that will replace the 3rd Gen Ryzen 3000 Matisse family of CPUs.
So, what’s next for AMD in the PC space? Well, I cannot share too much, but I can say our high-performance journey continues with our first “Zen 3” Client processor on-track to launch later this year. I will wrap by saying you haven’t seen the best of us yet…
AMD Executive Vice President of Computing & Graphics - Rick Bergman
As of now, the competitive advantage that AMD has with its Zen 2 based Ryzen 3000 is just way too big compared to whatever Intel has in their sleeves for this year, and Zen 3 based Ryzen 4000 CPUs are going to push that envelope even further.
AMD CPU Roadmap (2018-2020)
| Ryzen Family | Ryzen 1000 Series | Ryzen 2000 Series | Ryzen 3000 Series | Ryzen 4000 Series | Ryzen 5000 Series | Ryzen 6000 Series |
|---|---|---|---|---|---|---|
| Architecture | Zen (1) | Zen (1) / Zen+ | Zen (2) / Zen+ | Zen (3) / Zen 2 | Zen (3)+ / Zen 3? | Zen (4) / Zen 3? |
| Process Node | 14nm | 14nm / 12nm | 7nm | 7nm+ / 7nm | 7nm+ / 7nm | 5nm / 7nm+ |
| Server | EPYC 'Naples' | EPYC 'Naples' | EPYC 'Rome' | EPYC 'Milan' | EPYC 'Milan' | EPYC 'Genoa' |
| Max Server Cores / Threads | 32/64 | 32/64 | 64/128 | 64/128 | TBD | TBD |
| High End Desktop | Ryzen Threadripper 1000 Series (White Haven) | Ryzen Threadripper 2000 Series (Coflax) | Ryzen Threadripper 3000 Series (Castle Peak) | Ryzen Threadripper 4000 Series (Genesis Peak) | Ryzen Threadripper 5000 Series | Ryzen Threadripper 6000 Series |
| Max HEDT Cores / Threads | 16/32 | 32/64 | 64/128 | 64/128? | TBD | TBD |
| Mainstream Desktop | Ryzen 1000 Series (Summit Ridge) | Ryzen 2000 Series (Pinnacle Ridge) | Ryzen 3000 Series (Matisse) | Ryzen 4000 Series (Vermeer) | Ryzen 5000 Series (Warhol) | Ryzen 6000 Series (Raphael) |
| Max Mainstream Cores / Threads | 8/16 | 8/16 | 16/32 | 16/32 | TBD | TBD |
| Budget APU | N/A | Ryzen 2000 Series (Raven Ridge) | Ryzen 3000 Series (Picasso Zen+) | Ryzen 4000 Series (Renoir Zen 2) | Ryzen 5000 Series (Cezanne Zen 3) | Ryzen 5000 Series (Rembrandt Zen 3) |
| Year | 2017 | 2018 | 2019 | 2020/2021 | 2020/2021 | 2022 |
The post AMD Zen 3 Powered Next-Gen Ryzen 4000 ‘Vermeer’ CPUs Detailed: Up To 16 Cores / 32 Threads, 32 MB Shared L3 Cache Per CCD, 8 Cores Per CCX by Hassan Mujtaba appeared first on Wccftech.
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